risc-v

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Meta unveiled four custom Broadcom-built AI inference chips (MTIA 300/400/450/500) designed for ranking, recommendation, and generative AI workloads, with plans to deploy multiple gigawatts starting in 2027. The chips use modular chiplet architecture with RISC-V cores and HBM stacks, with successive generations claiming performance competitive or superior to commercial alternatives like Nvidia.

Meta Broadcom MTIA 300 MTIA 400 MTIA 450 MTIA 500
theregister.com · giuliomagnifico · 2 days ago · details · hn
0 2/10
technical-analysis

Analysis of RISC-V hardware performance limitations for Fedora Linux porting, demonstrating that current RISC-V builders are significantly slower (143 minutes vs 25-46 minutes on other architectures for binutils) and lack sufficient speed for inclusion as a primary Fedora architecture without faster hardware becoming available.

Marcin Juszkiewicz Fedora Linux RISC-V StarFive VisionFive 2 Milk-V Megrez Milk-V Titan UltraRISC UR-DP1000 SpacemiT K3 Red Hat QEMU
marcin.juszkiewicz.com.pl · todsacerdoti · 3 days ago · details · hn
0 5/10

Baochip-1x is a mostly-open, custom 22nm RISC-V SoC featuring a 350MHz Vexriscv CPU with MMU, cryptographic accelerators, and secure element features, designed for high-assurance applications running the pure-Rust Xous operating system. The chip breaks embedded SoC convention by including memory management unit protection (typically only found in high-end processors) to enable secure, isolated application execution and address space relocation without proprietary workarounds.

Baochip-1x bunnie Ed Snowden Betrusted Precursor Xous TSMC Vexriscv PicoRV32 IRIS inspection ARM7TDMI NXP iMXRT1062 Raspberry Pi RP2350 Sean Cross 39C3
bunniestudios.com · sohkamyung · 4 days ago · details · hn